Requirements of downscaling, a low ON-state resistance, and a high breakdown voltage are increasingly imposed on a MOSFET (Metal-Oxide Semiconductor Field Effect Transistor) so as to meet recent demands of high-efficiency and energy-saving techniques. With a view to satisfy the low resistance requirement among those requirements, a trench MOSFET at a high channel density is widely used. In a normal (normally-off) trench MOSFET, a semiconductor layer of a conduction type opposite to that of a source layer or a drift layer (a drain layer) is used as a base layer. By applying a gate voltage to such a normally-off trench MOSFET, a region of the base layer that faces a gate electrode is brought into an inversion state and a highly concentrated carrier region (“channel layer”) is formed. A low resistance device is thereby realized.
There is also known an accumulation mode FET as a lower resistance device. The accumulation mode FET does not include the base layer of the opposite conduction type but a base layer is formed of a low-concentration semiconductor of the same conduction type. In the accumulation mode FET, an OFF-state (in a case of the normally-off MOSFET) is realized by depleting the base layer even without any gate voltage. In an ON-state, carriers are induced to this base layer in an accumulation mode by applying a gate voltage to the accumulation mode FET, thereby realizing a low resistance device. Generally, in a case of forming an inversion layer and a conductive channel in the MOSFET, carriers in the channel (hereinafter, “channel carriers”) are confined in a very narrow region on the surface of the base layer. Because this region acts as an interface with a gate oxide film, the channel carriers are scattered by charges in the gate oxide film or on the interface and by interface non-uniformity (interface roughness). It is known that channel carrier mobility is accordingly lower than bulk mobility. In contrast, the accumulation mode FET is less affected by the reduction in the mobility caused by the interface because the channel carriers spread over a relatively wide region in the base layer (a low-concentration drift layer). Therefore, it is possible to form a high-mobility channel layer in the accumulation mode FET, thereby realizing the low resistance device. Furthermore, an impurity concentration of the base layer used in the accumulation mode FET is lower than that of the base layer used in the general MOSFET. Accordingly, an influence of impurity scattering on the accumulation mode FET is small and the low resistance device can be realized.
However, the accumulation mode FET is inferior in a breakdown voltage. In a case of an N-accumulation mode FET, holes generated on the bottom of each trench by impact ionization are normally emitted toward a source electrode. However, because the accumulation mode FET does not include so-called “carrier-emission electrodes (P-contacts)”, a base-source potential is slightly decreased so as to emit a large amount of generated holes. At this time, a large amount of electrons flow from the source electrode to the base layer. This increases a source-drain current and the accumulation mode FET shows current-voltage characteristics similar to those in a bipolar operation. As a result, it is disadvantageously difficult to ensure a high breakdown voltage. As described above, the problem with a conventional accumulation mode FET is that it is difficult to realize a low resistance device having a high breakdown voltage.